byLars Immisch and Hartmut Schröder.
We are building a communications controller based on the Motorola 68302 CPU. We want this controller to be a general purpose communications device. Users of this controllers shall be able to utilize the existing communications interfaces and protocols, as well as develop their own supports for other protocols.
The board layout and the basic software will be freely available.
- A serial converter
- A TCP/IP stack with PPP on one end and a serial access layer on the other to enable computers without TCP/IP to use IP services via a simple serial interface
- An ISDN modem
- An ISDN router with an ethernet interface
Advantages:
- It has the full 68000 Command set so many freely available assemblers and compilers can be used, most prominently gcc and gas.
- the built-in Universal Communication Processor has 3 independent interfaces that support the following protocols:
- Asynchronus Protocols (normal V.24)
- Synchronous Protocols like HDLC/SDLC or BISYNC
- IOM-2 Siemens ISDN Interface
- PCM Highwaylinks
- V.110 (someone said Jehova)
- Transparent Protocols
- built-in RAM (with DRAM Controller) and DMA-Interface
- 3 Timers including a watchdog timer
- Parallel I/O Ports, some with IRQ
Disadvantages:
- It does not have a BDM interface for debugging like the 683xx Family Members
- PGA versions are hard to get so you have to solder PQFP-Versions on PCB's
We do this in our free time - and being techies, we don't have much - so the project does not progress as fast as we had hoped it would. But we did get some things running:
- We built two prototype boards with PGA-CPU RAM/ROM, LCD 16*2 character display and two UART serial ports. (pictures for your amusement)
- We built four CPU module PCBs with the PQFP Version on the board.
- We built a development suite with the GNU gcc, assembler, linker and debugger for Linux and NextStep 3.3.
- We successfully ported RTEMS realtime operating system to our board.
- Integrate the GDB remote stub into the OS to allow source level debugging.
- Integrate an TCP/IP-Stack into the OS (we thought about the FreeBSD-Stack).
- get an ISDN-Interface working.
The PGA version of the CPU we used in the prototype is very hard to get. So we soon designed a PCB for the PQFP version. This PCB only carries the CPU, RAM, ROM, a clock and some reset logic. It fits on a half of an normal PCB and has two layers. It is designed for 16 MHz operation in 8 Bit mode (comparable to 10MHz 16BIT). It has one socket for a 32-pin DIL SRAM with either 128 kByte or 512 kByte and another socket for a 27Cxxx EPROM with 128kByte, 256kByte or 512kByte on it. The Flash EPROM types 28Cxxx and 29Cxxx can also be used.
Daughter boards
The CPU module has connectors for a daughterboard that might carry ISDN Level 1 controllers, LCD displays or some MAX232 for V.24 interfaces.
last edited: Oct, 14, 1996